Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral adapting
Reexamination Certificate
2006-05-16
2006-05-16
Peyton, Tammara (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral adapting
C710S066000, C709S246000, C341S050000, C341S100000, C341S101000
Reexamination Certificate
active
07047332
ABSTRACT:
A data transfer control device and an electronic instrument which can implement a process to be made on data transmitted and received through a high speed bus on a circuit operating at a low frequency. The data transfer control device has a conversion circuit which converts K-bit width data transferred at a frequency FC1(in USB 2.0 HS mode) through a bus into data having an L-bit width (L>K) by rearranging, and a processing circuit which receives the L-bit width data from the conversion circuit and carries out a K-bit based process on an L-bit basis at a frequency FC2lower than FC1. This enables to perform the K-bit based process at the low frequency FC2. Configuration on a transmission end can be implemented in the same manner. The transfer data in the USB 2.0 HS mode is processed on the L-bit basis while the transfer data in the FS mode is processed on the K-bit basis. The present invention is applicable also to the process on data transferred through a bus under the IEEE1394 or SCSI.
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USB2.0 Transceiver Macrocell Interface (UTMI) Specification, Version 1.0rc Apr. 25, 2000.
Ishida Takuya
Kamihara Yoshiyuki
Peyton Tammara
Seiko Epson Corporation
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