Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
Reexamination Certificate
2008-05-20
2010-06-15
Nguyen, Tanh Q (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output command process
C710S022000, C710S023000, C710S028000, C710S029000, C710S036000, C710S059000, C710S062000, C710S063000, C710S064000, C710S072000, C710S074000, C710S100000, C710S305000, C710S306000, C710S311000, C710S315000, C711S100000, C711S111000, C711S112000, C711S114000, C711S154000
Reexamination Certificate
active
07739419
ABSTRACT:
A data transfer control device includes a PATA I/F connected to a PATA bus, an SATA I/F connected to an SATA bus, and a sequence controller that controls a transfer sequence. The PATA I/F includes a task file register (TFR). The sequence controller suspends transmission of a register FIS corresponding to an ATA packet command issued by a host to a device, and performs a dummy setting that causes the host to issue an ATAPI packet command using the TFR. The sequence controller transmits the register FIS corresponding to the ATA packet command to the device after the host has issued the ATAPI packet command.
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U.S. Appl. No. 12/068,180 in the name of Kuniaki Matsuda et al., filed Feb. 4, 2008.
Nguyen Tanh Q
Oliff & Berridg,e PLC
Seiko Epson Corporation
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