Data transfer control device and electronic equipment

Details Data transfer control device and electronic equipment Data transfer control device and electronic equipment

2001-03-14

2004-05-04

Gaffin, Jeffrey (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

C710S065000, C370S505000, C370S506000

Reexamination Certificate

active

06732204

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a data transfer control device and electronic equipment.
BACKGROUND ART
The universal serial bus (USB) standard has recently attracted attention as an interface standard for connections between personal computers and peripheral equipment (broadly speaking: electronic equipment).
This USB standard has the advantage of enabling the connection of up to 127 devices, such as a personal computer and peripheral equipment, via a serial bus. This also has the advantage of enabling the use of connectors of the same standard to connect peripheral equipment such as a mouse, keyboard, and printer, which are connected by separate standard connectors in the prior art, and of making it possible to implement plug-and-play and hot-plug features.
With USB, data is encoded by a method called “no return to zero inversion” (NRZI) for transfer. This NRZI method is an encoding method based on the observation that the ratio of occurrence of “0” bits in data is generally far higher than the ratio of occurrence of “1” bits, to prevent slippage in synchronization caused by an increase in the frequency of changed in signal level on the serial bus. For that reason, NRZI maintains the previous signal level if a bit in the original data is 1, but causes the signal level to invert if a bit in the original data is 0.
This means that if NRZI encoding is performed on original data in which there are consecutive “0” bits, the signal level will change at each bit in the encoded data.
However, if there is a string of “1” bits in the original data, the signal level of the data after encoding will not change for a long time, causing problems of slippage in the synchronization.
For that reason, USB is designed to subject the original data to processing called bit stuffing (broadly speaking: bit insertion). In other words, if there are six consecutive “1” bits, a “0” bit is always inserted thereafter. The data that has been subjected to this bit stuffing is then encoded by the above-described NRZI method. This ensures that. a state in which the signal level does not change does not occur for long periods of time, even if there are strings of “1” bits in the original data.
SUMMARY OF THE INVENTION
One aspect of the present invention relates to a data transfer control device for data transfer over a serial bus, the data transfer control device comprising: a bit insertion circuit which inserts a bit of a second signal level on condition that there is a given number of bits of a first signal level consecutively; and a parallel-serial conversion circuit for converting parallel data into serial data which is transferred over the serial bus, wherein the bit insertion circuit is provided in a stage before the parallel-serial conversion circuit, and wherein the bit insertion circuit receives N-bit parallel input data that has been input at a given clock cycle from a previous-stage circuit and outputs N-bit parallel output data into which a bit has been inserted.
Another aspect of the present invention relates to a data transfer control device for providing data transfer over a serial bus, the data transfer control device comprising: a serial-parallel conversion circuit for converting serial data which is transferred over the serial bus into parallel data; and a bit deletion circuit which deletes a bit of a second signal level, on condition that there is a given number of bits of a first signal level consecutively, wherein the bit deletion circuit is provided in a stage after the serial-parallel conversion circuit, and wherein the bit deletion circuit receives N-bit parallel input data that has been input at a given clock cycle through the serial-parallel conversion circuit, and outputs N-bit parallel output data from which a bit have been deleted.


REFERENCES:
patent: 6266710 (2001-07-01), Dittmer et al.
patent: 6327316 (2001-12-01), Ikeda
patent: 6567423 (2003-05-01), Iyer
USB 2.0 Transceiver Macrocell Interface (UTMI) Specification, Version 1.0rc, Apr. 25, 2000, 1999-2000 Intel Corporation.

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