Data transfer control circuit with terminal sharing

Details Data transfer control circuit with terminal sharing Data transfer control circuit with terminal sharing

2005-09-13

2005-09-13

Park, Ilwoo (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output access regulation

C710S019000, C710S305000

Reexamination Certificate

active

06944686

ABSTRACT:
A DMA controller including a request queue for holding DMA transfer requests clears only the request queue without executing unnecessary DMA transfers and provides information about the states of the queue. A DMA controller is configured to enable data transfer control with respect to plural channels and includes a request queue capable of holding the identification information of channels concerned in plural data transfer requests, wherein the states of the request queue can be outputted and information held in the request queue can be cleared.

REFERENCES:
patent: 4270167 (1981-05-01), Koehler et al.
patent: 5781799 (1998-07-01), Leger et al.
patent: 5828901 (1998-10-01), O'Toole et al.
patent: 6049842 (2000-04-01), Garrett et al.

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