Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
1997-11-07
2003-05-13
Ellis, Richard L. (Department: 2653)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S220000, C347S009000, C347S211000
Reexamination Certificate
active
06564310
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a data transfer circuit, and to a recording apparatus and method. More particularly, this invention is concerned with a data transfer circuit for transferring data between a memory and a print head in a serial printer, and with a recording apparatus and method for realizing time-sharing recording.
2. Description of the Related Art
Currently, many serial printers such as ink-jet printers and wire-dot printers are designed to print an image composed of dots on recording paper. For printing, data and commands sent from a host system (a computer) must be analyzed in order to produce print data (which may be referred to as record data) in the form of bit image data provided in one-to-one correspondence with dots constituting an image to be printed. The bit image data is then stored in a print buffer in a memory. While a carriage having a print head (which may be referred to a record or recording head) mounted is being scanned, print data is read from the print buffer. Based on the data, the print head is driven. Thus, the recording paper is printed.
In recent years, there has been a tendency toward adopting a smaller dot pitch (which may be referred to as a pixel pitch) for a printer in an effort to improve image definition. An amount of print data is proportional to a dot density. The amount of print data to be stored in a print buffer therefore increases with higher definition. On the other hand, the frequency used for driving a print head is also increasing. This is intended to increase a printing speed. For reading the print buffer, it is therefore necessary to transfer a large amount of data quickly. Data transfer dependent on software imposes a large load on a processor (MPU). Recently, it has become common to install a data transfer circuit designed exclusively for reading the print buffer in order to implement direct memory access (DMA) and other hardware processing.
However, a conventional data transfer circuit has a relatively simple transfer function alone. Such a data transfer circuit therefore merely reads data sequentially from a print buffer and prints the data. A data structure in the print buffer must be consistent with a dot array formed by a print head. When a print head has a complex structure, for example, when a dot array formed by a print head lies askew with respect to a scan direction, or when a print head such as the one in a color printer has printing elements (which may be referred to as recording elements) differing among respective colors, the data structure in the print buffer is complex and more time is required for production of print data.
With a recent trend toward a higher-speed printer, not only a printing speed of a print head but also a time required for production of print data has come to greatly affect a throughput of a printer. What is now a critical problem is how to reduce the time required for production of print data.
Recording techniques, in which a print head having a plurality of printing elements is used to record on a recording medium are divided into dot-impact recording techniques, thermal recording techniques, and an ink-jet recording techniques. In these techniques, a larger number of printing elements leads to a larger power consumption for instantaneous driving. The techniques therefore require a large-scale power supply unit and a large-capacity power line capable of delivering a large current.
As far as the ink-jet recording technique is concerned, when numerous nozzles (printing elements) are driven simultaneously, shock waves generated by the nozzles interfere with one another in a common liquid chamber incorporated in a print head and used for feeding ink. This results in unstable jetting.
A conventional method often adopted as a means for solving the foregoing problem is that printing elements are divided into a plurality of groups and driven at shared time instants within a drive cycle. This method alleviates the foregoing drawback of the power supply system because the power consumption for driving nozzles is even within the drive cycle. When used in combination with the ink-jet recording technique, this method minimizes interference among shock waves.
However, it is only when a plurality of printing elements are driven simultaneously that ink droplets are recorded at correct dot positions (which may be referred to as pixel locations) on a recording medium. When the printing elements are driven at shared time instants, ink droplets are recorded at pixel locations different from correct ones, as shown in FIG.
17
. This results in a disordered image. In the example shown in
FIG. 17
, the number of groups of printing elements is four. The groups are driven at equally shared time instants. An intersection between dashed lines indicates a correct recording position. Black dots indicate positions at which ink droplets are shot by a print head according to image information. White dots indicate positions at which ink droplets are not shot according to image information and which are invisible on recording paper. In this example, a longitudinal rule is drawn.
FIG. 17
reveals that when shared time instants at which groups of printing elements are driven are distributed widely within a drive cycle, a resultant image is prone to terrible disorder.
The shared time instants at which groups of printing elements are driven cannot therefore be distributed widely.
FIG. 18
shows an example in which groups of printing elements are driven at equally-shared time instants within a half of a drive cycle. Image disorder is alleviated but still exists, and the aforesaid effect of suppressing interference among shock waves in a common liquid chamber is halved.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a data transfer circuit that minimizes a load imposed on a CPU and depends very little on a data structure in a buffer.
Another object of the present invention is to provide a recording apparatus and method in which shared time instants at which groups of printing elements are driven are distributed widely within a drive cycle in order to further alleviate the drawback of a power supply system and to further reduce the interference among shock waves associated with an ink-jet recording technique, and in which even when the groups of printing elements are driven at shared time instants, image disorder does not occur.
In order to achieve the foregoing objects, the present invention is characterized by a data transfer circuit, comprising:
an address setting circuit for setting a start address for a buffer memory;
offset setting means for setting an offset for the buffer memory;
address creating means for creating a predetermined number of consecutive transfer addresses to be supplied for reading from the buffer memory using a reference address; and
arithmetic logic means for, after said address creating means has created transfer addresses using said start address as a reference address, calculating a new reference address in accordance with said offset relative to said start address so as to provide said new reference address to said address creating means for creating further transfer addresses.
In order to achieve the foregoing objects, the present invention is characterized by a data transfer circuit, comprising:
address setting means for setting a plurality of start addresses for a buffer memory
address selecting means for selecting said plurality of start addresses sequentially;
offset setting means for setting a plurality of offsets for the buffer memory, each said offset being associated with one of said start addresses;
offset selecting means for selecting offsets associated with the start addresses selected by said address selecting means;
address creating means for creating a predetermined number of consecutive transfer addresses to be supplied for reading from the buffer memory using reference addresses; and
arithmetic logic means for, after said address creating means created transfer addresses using said start
Hirasawa Shin'ichi
Inui Toshiharu
Nakajima Kazuhiro
Nakata Kazuhiro
Yamamoto Tadashi
Ellis Richard L.
Patel Gautam R.
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