Electrical computers and digital processing systems: memory – Storage accessing and control
Reexamination Certificate
2007-08-07
2007-08-07
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
C712S215000, C711S105000
Reexamination Certificate
active
10815982
ABSTRACT:
A data processor core10comprising a memory access interface portion30operable to perform data transfer operations between an external data source and at least one memory associated with said data processor core and a data processing portion12operable to perform further data processing operations in response to receipt of said processor clock signal CLK. The two portions of the core being operable to be independently enabled such that one portion may be active while the other is inactive.
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Grisenthwaite Richard Roy
Tran Tan Ba
Williams Gerard Richard
Arm Limited
Bataille Pierre-Michel
Nixon & Vanderhye P.C.
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