Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2005-05-05
2010-12-14
Tsai, Henry W (Department: 2184)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S065000, C710S066000, C710S307000, C710S309000, C710S310000, C710S316000, C711S201000, C370S473000, C370S474000, C370S394000
Reexamination Certificate
active
07853737
ABSTRACT:
A communication data processing device according to an aspect of the invention includes a memory storing data, a data bus transmitting data read from the memory, a plurality of buffer memories temporarily storing data from the memory via the data bus and being capable of receiving and providing data independently of each other, a bus arbiter arbitrating use of the data bus to control data read from the memory to the plurality of buffer memories, an aligner aligning input data in a sequence corresponding to a packet communication, and a selector selecting a buffer memory from the plurality of buffer memories to output data from the selected buffer memory toward the aligner.
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IBM Technical Disclosures NN9212375, NN921230, and NN9511359.
Japanese Office Action dated Sep. 29, 2009 (with partial English translation).
McGinn IP Law Group PLLC
NEC Electronics Corporation
Snyder Steven G
Tsai Henry W
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