Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-12-02
2000-11-21
Ellis, Kevin L.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711138, 711134, 711137, 711213, G06F 1212
Patent
active
061516627
ABSTRACT:
A microprocessor assigns a data transaction type to each instruction. The data transaction type is based upon the encoding of the instruction, and indicates an access mode for memory operations corresponding to the instruction. The access mode may, for example, specify caching and prefetching characteristics for the memory operation. The access mode for each data transaction type is selected to enhance the speed of access by the microprocessor to the data, or to enhance the overall cache and prefetching efficiency of the microprocessor by inhibiting caching and/or prefetching for those memory operations. Instead of relying on data memory access patterns and overall program behavior to determine caching and prefetching operations, these operations are determined on an instruction-by-instruction basis. Additionally, the data transaction types assigned to different instruction encodings may be revealed to program developers. Program developers may use the instruction encodings (and instruction encodings which are assigned to a nil data transaction type causing a default access mode) to optimize use of processor resources during program execution.
REFERENCES:
patent: 4928239 (1990-05-01), Baum et al.
patent: 5371865 (1994-12-01), Aikawa et al.
patent: 5652858 (1997-07-01), Okada et al.
patent: 5745728 (1998-04-01), Genduse et al.
patent: 5822757 (1998-10-01), Chi
patent: 6009512 (1999-12-01), Christie
Chi et al., "Reducing Data Access Penalty Using Intelligent Opcode-Driven Cache Prefetching," 1995, IEEE, p 512-517.
IBM Technical Disclosure Bulletin, "Methods of Specifying Data Prefetching without using a Separate Instruction", vol. 38 No. 6, Jun. 1995, p 355-356.
"Programming the 80386" by John H. Crawford and Patrick P. Gelsinger, 1987 SYBEK Inc, Alameda, CA, pp. 55.
Christie David S.
McMinn Brian D.
Meier Stephan G.
Pickett James K.
Advanced Micro Devices , Inc.
Ellis Kevin L.
Merkel Lawrence J.
LandOfFree
Data transaction typing for improved caching and prefetching cha does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data transaction typing for improved caching and prefetching cha, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data transaction typing for improved caching and prefetching cha will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1267080