Data supplying apparatus for independently performing hit determ

Details Data supplying apparatus for independently performing hit determ Data supplying apparatus for independently performing hit determ

1996-06-26

2000-06-20

Bragdon, Reginald G.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711133, 711140, 710 55, 710 57, G06F 1208

Patent

active

06078993&

ABSTRACT:
An address buffer that stores information used to access a data memory is disposed in a cache unit that supplies data such as an instruction code to an instruction executing unit. A tag memory and a data memory are independently accessed. The data memory is accessed corresponding to access information stored in the address buffer. Data is output from the data memory in the input order of data requests. When a data release signal is not received from the instruction executing unit, since access information is buffered in the address buffer, a large data buffer for storing the output data of the data memory is not required. In addition, in an associative type cache unit, the tag memory and the address buffer can be formed in the same memory.

REFERENCES:
patent: 5222223 (1993-06-01), Webb, Jr. et al.
patent: 5586295 (1996-12-01), Tran
patent: 5802575 (1998-09-01), Greenley et al.

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