Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-12-05
2006-12-05
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07146595
ABSTRACT:
A floor planner tool for integrated circuit design which provides tools and displays for a designer to create a floor plan to define desired placement of circuits defined in a logical netlist by creating a physical hierarchy comprised of nested pblocks. Each pblock is a data structure which contains data which defines which circuits from the logical netlist are assigned to it. Each pblock stands alone and can be input to a place and route tool without the rest of the physical hierarchy. Each pblock data structure contains pointers to the circuits on the netlist assigned to that plbock, identifies other pblocks nested within it and contains at least a list of boundary pins for that pblock. Net data structures in the physical hierarchy define which nets are connected to which pins. PCellview data structures define the internal structure of each pblock.
REFERENCES:
patent: 5140526 (1992-08-01), McDermoth et al.
patent: 5499191 (1996-03-01), Young
patent: 5513119 (1996-04-01), Moore et al.
patent: 5617327 (1997-04-01), Duncan
patent: 5648913 (1997-07-01), Bennett et al.
patent: 5659484 (1997-08-01), Bennett et al.
patent: 5991523 (1999-11-01), Williams et al.
patent: 6170080 (2001-01-01), Ginetti et al.
patent: 6223329 (2001-04-01), Ling et al.
patent: 6408422 (2002-06-01), Hwang
patent: 6631508 (2003-10-01), Williams
patent: 2004/0078767 (2004-04-01), Burks et al.
U.S. Appl. No. 10/792,164, filed Mar. 3, 2004 Knol et al.
Wang, Maogang, et al., “Multi-Million Gate FPGA Physical Design Challenges,” ICCAD '03, Nov. 11-13, 2003, pp. 891-898, Available from ICCAD, San Jose, California, USA.
Knol David A.
Raje Salil Ravindra
Fish Ronald C.
Levin Naum B.
Maunu LeRoy D.
Siek Vuthe
Xilinx , Inc.
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