Data strobe synchronization for DRAM devices

Details Data strobe synchronization for DRAM devices Data strobe synchronization for DRAM devices

2007-04-24

2007-04-24

Graham, Kretelia (Department: 2827)

Static information storage and retrieval

Read/write circuit

Signals

C365S191000

Reexamination Certificate

active

11068582

ABSTRACT:
Methods and apparatus that determine, at a device (e.g., a DRAM device), a phase difference between two externally supplied timing signals such as a clock signal (CLK) and a data strobe signal (DQS) are provided. Adjustments may be made to timing of one of the signals itself or other internal memory signals that are, perhaps, utilized in circuits controlled by the DQS signal.

REFERENCES:
patent: 6329854 (2001-12-01), Lee et al.
patent: 2003/0086303 (2003-05-01), Jeong
patent: 2004/0222828 (2004-11-01), Ishikawa
patent: 1020000018490 (2000-04-01), None
patent: 1020030037588 (2003-05-01), None
KIPO Examination Report dated Dec. 15, 2006.

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