Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-09-29
1999-09-14
Hua, Ly V.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 8, 714770, G06F 1100
Patent
active
059516933
ABSTRACT:
A system and method for reconstructing data, and/or generating a parity bit for use in reconstructing data, in a data storage system having a set of disk drives and an associated redundant disk drive. The system includes a memory having an exclusive OR gate to provide an accumulated exclusive ORing of the data successively coupled thereto. The accumulated exclusive OR result is coupled to the redundant disk drive in generating the parity bit or to a replaced disk drive when reconstructing data. The system includes: a bus; a controller coupled between the bus and the disk drives; an addressable memory coupled to the bus. The memory includes: a write buffer memory having an input coupled to the bus; a read buffer memory having an output coupled to the bus; and, the exclusive OR logic unit having a pair of inputs. One input is coupled to an output of the write buffer memory and another input is coupled to the output of the read buffer memory. The exclusive OR logic unit produces at the output thereof an exclusive OR logic function between data at the pair of inputs of such logic unit. A random access memory is coupled to an output of the logic unit.
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Leshem Eli
Walton John K.
Elisea Pierre Eddy
EMC Corporation
Hua Ly V.
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