Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
1998-12-30
2001-05-08
Shin, Christopher B. (Department: 2782)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C710S002000, C710S074000, C710S120000, C711S114000, C714S016000
Reexamination Certificate
active
06230217
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates generally to data storage systems, and more particularly to data storage systems having redundancy arrangements to protect against total system failure in the event of a failure in a component or subassembly of the storage system.
As is known in the art, large mainframe computer systems require large capacity data storage systems. These large main frame computer systems generally includes data processors which perform many operations on data introduced to the computer system through peripherals including the data storage system. The results of these operations are output to peripherals, including the storage system.
One type of data storage system is a magnetic disk storage system. Here a bank of disk drives and the main frame computer system are coupled together through an interface. The interface includes CPU, or “front end”, controllers (or directors) and “back end” disk controllers (or directors). The interface operates the controllers (or directors) in such a way that they are transparent to the computer. That is, data is stored in, and retrieved from, the bank of disk drives in such a way that the mainframe computer system merely thinks it is operating with one mainframe memory. One such system is described in U.S. Pat. No. 5,206,939, entitled “System and Method for Disk Mapping and Data Retrieval”, inventors Moshe Yanai, Natan Vishlitzky, Bruno Alterescu and Daniel Castel, issued Apr. 27, 1993, and assigned to the same assignee as the present invention.
As described in such U.S. Patent, the interface may also include, in addition to the CPU controllers (or directors) and disk controllers (or directors), addressable cache memories. The cache memory is a semiconductor memory and is provided to rapidly store data from the main frame computer system before storage in the disk drives, and, on the other hand, store data from the disk drives prior to being sent to the main frame computer. The cache memory being a semiconductor memory, as distinguished from a magnetic memory as in the case of the disk drives, is much faster than the disk drives in reading and writing data.
The CPU controllers, disk controllers and cache memory are interconnected through a backplane printed circuit board. More particularly, disk controllers are mounted on disk controller printed circuit boards. CPU controllers are mounted on CPU controller printed circuit boards. And, cache memories are mounted on cache memory printed circuit boards. The disk controller, CPU controller and cache memory printed circuit boards plug into the backplane printed circuit board. In order to provide data integrity in case of a failure in a controller, the backplane printed circuit board has a pair of buses. One set the disk controllers is connected to one bus and another set of the disk controllers is connected to the other bus. Likewise, one set the CPU controllers is connected to one bus and another set of the CPU controllers is connected to the other bus. The cache memories are connected to both buses. Each one of the buses provides data, address and control information.
Thus, the use of two buses provides a degree of redundancy to protect against a total system failure in the event that the controllers, or disk drives connected to one bus fail. Further, the use of two buses increases the data transfer bandwidth of the system compared to a system having a single bus.
SUMMARY OF THE INVENTION
In accordance with the invention, a front-end portion of the directors is coupled to the host computer and rear-end portion of the directors, having input/output interfaces, is coupled to disk drive bank. The disk drive bank has a plurality of sets of disk drives. Each one of the sets of disk drives is connected to the input/output interface of a corresponding one of the rear-end directors and, through a printed circuit board, to the input/output interface of the rear-end director in another one of the directors.
In accordance with another feature of the invention, each input/output interface includes a primary SCSI initiator section and a secondary SCSI initiator section, the primary SCSI initiator section of said one of the rear-end directors being electrically connected to the secondary SCSI initiator section of said another one of the directors through the printed circuit board.
In accordance with another feature of the invention, the printed circuit board has a plurality of electrical connectors arranged in a linear array and electrically connected to the busses. The electrical connectors are adapted to receive the directors on one side of the printed circuit board. Each one of the sets of disk drives is connected to the input/output interface of a corresponding one of the rear-end directors and, through the printed circuit board, to the input/output interface of the rear-end director in another one of the directors. The directors are disposed in adjacent ones of the electrical connectors.
REFERENCES:
patent: 5206939 (1993-04-01), Yanai et al.
patent: 5398158 (1995-03-01), Fisher et al.
patent: 5748885 (1998-05-01), Gallagher
patent: 5887151 (1999-03-01), Raz et al.
patent: 5919104 (1998-10-01), Tuccio
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patent: 5966030 (1999-11-01), Ofer
patent: 6035412 (2000-03-01), Tamer et al.
patent: 6038605 (2000-03-01), Vishlitzky et al.
patent: 6061504 (2000-05-01), Tzelnic et al.
patent: 6061761 (2000-05-01), Bachmat
patent: 6105085 (2000-08-01), Farley
patent: 6112257 (2000-08-01), Mason, Jr. et al.
patent: 6128750 (2000-10-01), Espy et al.
patent: 6154853 (2000-11-01), Kedem
patent: 6154854 (2000-11-01), Stallmo
Gallagher Brian
Khan Farouk
Tuccio William
Daly, Crowley & Mofford
Raytheon Company
Shin Christopher B.
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