Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-12-27
2005-12-27
DeCady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
06981196
ABSTRACT:
A magnetoresistive solid-state storage device (MRAM) performs error correction coding (ECC) of stored information. Since currently available MRAM devices are subject to physical failures, data storage arrangements are described to minimize the affect of those failures on the stored ECC encoded data, including storing all bits of each symbol in storage cells16in one row12(FIG.3), or in at least two rows12but using storage cells16in the same columns14(FIG.4). Sets of bits taken from each row12are allocated to different codewords204(FIG.5) and the order of allocation can be rotated (FIG.6). A second level of error checking can be applied by adding a parity bit226to each symbol206(FIG.7).
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Davis James A
Jedwab Jonathan
Paterson Kenneth Graham
Seroussi Gadiel
Smith Kenneth K
Abraham Esaw
DeCady Albert
Hewlett--Packard Development Company, L.P.
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