Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-08-17
2004-09-21
Tran, Denise (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S165000, C365S185290
Reexamination Certificate
active
06795890
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to memory having a plurality of erasure-unit regions in which data are erased or written in predetermined units, and more particularly, to a data processing device using, e.g., flash memory.
Flash memory corresponds to semiconductor memory in which data can be electrically written or from which data can be electrically erased. The flash memory is characterized by the ability to retain memory contents without power supply. Particularly in the field of industrial computers, flash memory is often used as a storage medium substituting for a hard disk.
However, new data cannot be written directly in flash memory. More specifically, data must be collectively erased in units of, for example 64 K (hereinafter referred to as “erasure units”), before new data are written in the flash memory. After data have been erased in erasure units, new data corresponding to the size of the erased data are written, thus rewriting the data stored in the flash memory.
Particularly, from a structural viewpoint, in large-capacity and high-density flash memory, an erasure unit is larger than the unit for rewriting (hereinafter referred to as a “rewriting unit”). For this reason, in many cases, data used for rewriting become greater in size than the erasure unit. Even in a case where such data are rewritten into the flash memory, data must erased in erasure units which may comprise data segments which do not need to be rewritten, and the data containing the thus-erased data segments must be written in the flash memory once again.
A technique for rewriting data in flash memory is described in the Unexamined Japanese Patent Application Publication No. Hei 5-233478.
FIG. 18
is a block diagram showing the outline of circuitry of the background art. The operation of the circuit will now be described by reference to FIG.
18
.
A data rewriting operation of FRAM
4
will be described. Data to be rewritten into the FRAM
4
are downloaded into SRAM
3
. Data pertaining to an area of the FRAM
4
which does not need to be subjected to rewriting are copied to a register
5
. All the contents of the FRAM
4
are deleted by means of a FRAM clear program stored in EPROM
2
. The data that have been downloaded into the SRAM
3
are copied to the FRAM
4
. Further, the data which have been saved in the register
5
are copied to the original area on the FRAM
4
which does not need to be subjected to rewriting.
In the prior art, in a case where volatile memory is used as the register
5
which acts as an area into which data are saved at the time of rewriting of the flash memory, in the event that supply of power to the data processing device is interrupted after erasure of data, data pertaining to an area not to be subjected to rewriting, as well as data pertaining to an area to be subjected to rewriting, are lost, thus deteriorating the reliability of flash memory.
In order to prevent loss of the data recorded in the register, the data which have been recorded on the register must be written into flash memory immediately. From an operational viewpoint, flash memory must be erased every time the data stored in flash memory are rewritten. Eventually, flash memory must be subjected to erasing operations in the number corresponding to the number of times data are rewritten. A limitation is imposed on the number of times flash memory can be subjected to erasure (usually 100,000 times or thereabouts). Therefore, the number of times flash memory is subjected to erasure must be diminished. In the background art, however, the number of times flash memory is subjected to erasure is increased, thus shortening the life of flash memory.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve such a problem of the prior art and is aimed at providing a data processing device which prevents erasure of data from flash memory when the data recorded in the flash memory are rewritten and exhibits improved reliability when data are written into the flash memory.
The present invention is also aimed at providing a data processing device which diminishes the number of times flash memory is subjected to erasure, through use of a simple structure and while maintaining reliability, in the event of a limitation being imposed on the number of times flash memory is subjected to erasure.
To this end, the present invention provides a data storage method by which data recorded in memory are rewritten through use of memory having a plurality of erasure-unit regions into which data are written in predetermined units and from which data are erased in predetermined units, as well as through use of a nonvolatile erasure block buffer for storing write data to be written into the erasure-unit regions and non-changing data belonging to the erasure-unit regions, the method comprising:
a first erasure block buffer write step of writing first write data into the erasure block buffer, in response to a first write request for requesting writing of the first write data into a first erasure-unit region of the memory;
a second erasure block buffer write step of writing into the erasure block buffer non-changing data recorded in the first erasure-unit region, in response to the first write request for requesting writing of the first write data into the first erasure-unit region of the memory;
an erasure step of erasing the data from the first erasure-unit region after the second erasure block buffer write step; and
a memory write step of writing into the first erasure-unit region the first write data and the non-changing data stored in the erasure block buffer.
By way of example, the present invention is described in connection with a first embodiment (shown in FIG.
3
).
Further, the present invention provides a data storage method by which data stored in memory are rewritten through use of memory having a plurality of erasure-unit regions into which data are written in predetermined units and from which data are erased in predetermined units, as well as a nonvolatile erasure block buffer for storing write data to be written into the erasure-unit regions and non-changing data belonging to the erasure-unit regions, the method comprising:
a first erasure block buffer write step of writing first write data into the erasure block buffer, in response to a first write request for requesting writing of the first write data into a first erasure-unit region of the memory;
a second erasure block buffer write step of writing into the erasure block buffer non-changing data recorded in the first erasure-unit region, in response to the first write request for requesting writing of the first write data into the first erasure-unit region of the memory;
a third erasure block buffer write step of writing second write data into the memory, in response to a second write request for requesting writing of the second write data into the memory, after the first erasure block buffer write step; and
a memory write step of writing the data written in the erasure block buffer into the first erasure-unit region after the second erasure block buffer write step and the third erasure block buffer write step.
By way of example, the present invention is described in connection with a second embodiment (shown in FIG.
5
).
Preferably, the first erasure block buffer write step is followed by a comparison step of comparing the erasure-unit region into which the first write data are to be written with the erasure-unit region into which the second write data are to be written, and, in a case where a match is obtained as a comparison result in the comparison step, processing pertaining to the third erasure block buffer write step and processing pertaining to the memory write step are performed.
By way of example, the present invention is described in connection with a second embodiment (shown in FIG.
5
).
Still further, the present invention provides a data storage method by which data recorded in memory are rewritten through use of memory having a plurality of erasure-unit regions into which data are written in predetermined
Kobayashi Saburo
Settsu Atsushi
Sugai Naoto
Mitsubishi Denki & Kabushiki Kaisha
Tran Denise
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