Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2006-01-03
2006-01-03
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S185250, C365S185180, C365S185240
Reexamination Certificate
active
06982918
ABSTRACT:
A data storage device such as a DRAM memory having a plurality of data storage cells (10) is disclosed. Each data storage cell (10) has a physical parameter which varies with time and represents one of two binary logic states. A selection circuit (16), writing circuits (18) and a refreshing circuit (22) apply input signals to the data storage cells to reverse the variation of the physical parameter with time of at least those cells representing one of the binary logic states by causing a different variation in the physical parameter of cells in one of said states than in the other.
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Fazan Pierre
Okhonin Serguei
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