Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-07-18
2006-07-18
Chace, Christian P. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S144000, C711S208000, C711S209000
Reexamination Certificate
active
07080207
ABSTRACT:
A system, method and apparatus for providing and utilizing a storage cache descriptor by a storage controller are disclosed which provide the ability to effectively balance the size of storage controller cache blocks and the amount of data transferred in anticipation of requests, such as requests by a host. The apparatus may include a storage device, a storage controller and a cache. The storage controller stores electronic data in the cache by including a cache descriptor that defines data contained in a cache block, the cache descriptor including at least one field describing a device block of the cache block. The at least one field may include, by way of example, at least one of a present field, modified field, pinned field and write-in progress field.
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patent: 5787242 (1998-07-01), DeKoning et al.
patent: 6029229 (2000-02-01), Vishlitzky
patent: 6073209 (2000-06-01), Bergsten
patent: 6108100 (2000-08-01), McVey et al.
Chace Christian P.
LSI Logic Corporation
Suiter - West - Swantz PC LLO
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