Data slicer having an error correction device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

Reexamination Certificate

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Details

C714S704000

Reexamination Certificate

active

07992077

ABSTRACT:
A data slicer includes an error bit predictor, a DC level compensator, a co-channel detector, and an output device. The data slicer generates four bytes according to four slicing levels respectively. The four slicing levels are a DC level, a level generated by adding a predetermined offset to the DC level, a level generated by subtracting the predetermined offset from the DC level, and a compensated level generated by the DC level compensator. The co-channel detector determines if the compensated level has the co-channel interference. The output device generates an output byte according to indication signals generated by the co-channel detector and the error bit predictor and the parity check of the four bytes.

REFERENCES:
patent: 4133980 (1979-01-01), Moed
patent: 4962501 (1990-10-01), Byers et al.
patent: 6380969 (2002-04-01), Limberg
patent: 6445792 (2002-09-01), Shiraki et al.
patent: 6608871 (2003-08-01), Popplewell
patent: 5668062 (1981-06-01), None
patent: I268704 (2006-12-01), None

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