Data reduction circuit

Details Data reduction circuit Data reduction circuit

1986-04-03

1987-12-15

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

332 11D, 358135, H04B 1406

Patent

active

047138289

ABSTRACT:
In this circuit, the subcircuits substantially contributing to the computation time of the time-critical loop are only a subtracter, a quantizer and a delay element. The digital video signals whose number of bits is to be reduced can thus have clock rates of 17 to 20 MHz if the circuit is implemented using CMOS or N-channel MOS technology.

REFERENCES:
patent: 4255763 (1981-03-01), Maxemchuk et al.
patent: 4375013 (1983-02-01), Cointot et al.
patent: 4460923 (1984-07-01), Hirano et al.
patent: 4541102 (1985-09-01), Grallert
patent: 4562468 (1985-12-01), Koga

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