Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2008-04-03
2009-12-08
Liu, Shuwang (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S355000, C375S348000
Reexamination Certificate
active
07630467
ABSTRACT:
An improved data recovery circuit based on an oversampling technique to select the best data sample to be kept as the data to recover that is only based on accumulating the data edges (or transitions). The incoming serial data stream with jitter is oversampled in an oversampling circuit by means of the multiple phases of a reference clock (clk) to produce data samples. Each sample is compared to the sample(s) collected with the next clock phase(s) in an edge detector circuit to determine the presence of a data edge and the edge information is stored and accumulated in a data edge memory. A selection determination circuit uses the memorized edge information to indicate which sample is the farthest from the data edges. A selection validation circuit validates the selection to avoid false determination due to jitter and skew.
REFERENCES:
patent: 4635049 (1987-01-01), Dodge et al.
patent: 7221725 (2007-05-01), Tinker
patent: 2002/0178285 (2002-11-01), Donaldson et al.
patent: 2004/0062362 (2004-04-01), Matsuya
patent: 2004/0096016 (2004-05-01), Choudhury et al.
International Business Machines - Corporation
Liu Shuwang
MacKinnon Ian D.
Stevens Brian J
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