Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-05-17
2005-05-17
Tan, Vibol (Department: 2819)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S727000, C714S798000, C714S002000, C326S016000, C326S037000
Reexamination Certificate
active
06895542
ABSTRACT:
A data recovery circuit for use in a data receiving system to recover an m-bit data stream from an n-bit data stream. The data recovery circuit comprises an n-bit data reconstruction circuit for selecting a data boundary in response to a boundary selection signal and producing a reconstructed n-bit data stream based on the boundary data, a FIFO buffer circuit for temporarily storing the reconstructed n-bit data stream and reading out the m-bit data stream, and a detection circuit for detecting whether the m-bit data stream from the FIFO buffer circuit conforms to a predetermined format and thereby producing a boundary selection signal for controlling the data boundary selection of the n-bit data reconstruction circuit.
REFERENCES:
patent: 5864250 (1999-01-01), Deng
patent: 5920897 (1999-07-01), Jin et al.
patent: 6545507 (2003-04-01), Goller
Liu Sheng-Yao
Smith Sterling
Tsai Huimin
Bednarek Michael
MStar Semiconductor Inc.
Pillsbury Winthrop Shaw & Pittman LLP
Tan Vibol
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