Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2007-06-12
2007-06-12
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S086000, C326S029000, C375S257000
Reexamination Certificate
active
11055805
ABSTRACT:
Pseudo-differential drivers and receivers are used to communicate data signals between two or more IC chips. The data paths are aligned using programmable delay circuitry to de-skew each data path. A programmable reference generator is used to generate a reference voltage used by one or a group of receivers to detect the data signals. The reference voltage is adjustable using coarse as well as fine digitally controlled voltage increments. Test signals are sent from the driver to the receiver and the reference voltage is varied over its adjustable range using the coarse and fine adjustment controls while circuitry determines a measure of the detection timing jitter on successive transitions of the test signal. The operational value of the reference voltage is set to the value where the detection timing jitter is determined to be a minimum.
REFERENCES:
patent: 5864584 (1999-01-01), Cao et al.
patent: 6304098 (2001-10-01), Drost et al.
patent: 7058131 (2006-06-01), Dreps et al.
patent: 2003/0086501 (2003-05-01), Dreps et al.
Dreps Daniel M.
Ferraiolo Frank D.
Reese Robert J.
Wiedemeier Glen A.
International Business Machines - Corporation
Tan Vibol
Winstead PC
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