Data readout circuit of memory cells, memory circuit and...

Details Data readout circuit of memory cells, memory circuit and... Data readout circuit of memory cells, memory circuit and...

2007-09-28

2008-09-09

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Particular read circuit

C365S189020

Reexamination Certificate

active

07423917

ABSTRACT:
A data readout circuit of memory cells for reading out data from the memory cells includes a determination circuit (3) that reads out a plurality of data from multiplexed memory cells (5) having a unique data inversion direction and determines data not inverted in the data inversion direction as valid data stored in the memory cells (5) in a case when there are different data in the readout data; and an output unit (4) that outputs the data determined as valid data by the determination circuit (3) as memory data of the memory cells.

REFERENCES:
patent: 5623444 (1997-04-01), Gotou et al.
patent: 5802551 (1998-09-01), Komatsu et al.
patent: 5812470 (1998-09-01), Ochoa et al.
patent: 5966720 (1999-10-01), Itoh et al.
patent: 5983312 (1999-11-01), Komatsu
patent: 6625072 (2003-09-01), Ohtani et al.
patent: 5-233426 (1993-09-01), None
patent: 7-105691 (1995-04-01), None
patent: 2001-43691 (2001-02-01), None
International Search Report of the International Application No. PCT/JP2005/006343 (mailed on Jun. 28, 2005).

Affiliated with

Also associated with

Rating

Data readout circuit of memory cells, memory circuit and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data readout circuit of memory cells, memory circuit and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data readout circuit of memory cells, memory circuit and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3992805