Static information storage and retrieval – Read/write circuit – Signals
Patent
1998-10-19
2000-02-29
Nelms, David
Static information storage and retrieval
Read/write circuit
Signals
3652335, 365206, G11C 1104
Patent
active
060317698
ABSTRACT:
A data reading circuit for a semiconductor memory device is provided that reduces noise effects by stably operating a latch sense amplifier during a high speed operation. The data reading circuit produces a stable output voltage. The data reading circuit includes a sense amplifier controller that generates a first pulse signal having a time width for fully equalizing a sense amplifier. The sense amplifier generates the first pulse signal by delaying an address transition detection signal while a high level read signal is being outputted. The sense amplifier controller also combines the address transition detection signal and the first pulse signal to output a second pulse signal. A first current mode dual latch sense amplifier senses a data signal from a memory cell in accordance with the second pulse signal from the sense amplifier controller and transfers the sensed data in accordance with the first pulse signal. The data reading circuit produces a stable output voltage without generating an increased width address transition detection signal.
REFERENCES:
patent: 5537066 (1996-07-01), Kawashima
patent: 5757718 (1998-05-01), Suzuki
patent: 5889708 (1999-03-01), Hwang
Lam David
LG Semicon Co. Ltd.
Nelms David
LandOfFree
Data reading circuit for semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data reading circuit for semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data reading circuit for semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-688910