Data read circuit for a nonvolatile semiconductor memory

Details Data read circuit for a nonvolatile semiconductor memory Data read circuit for a nonvolatile semiconductor memory

1996-05-28

1998-05-05

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518517, 36518905, G11C 1602

Patent

active

057485364

ABSTRACT:
A data read-out circuit is provided for a nonvolatile semiconductor memory having at least one bit line and a plurality of memory transistors connected to the bit line, and including at least one data sense line. The data read-out circuit includes a precharge set circuit, a current supplying circuit and a sense amplifier. The precharge set circuit is connected between the bit line and the data sense line and is operative to set a voltage of the bit line to a preselected precharge voltage lower than a power supply voltage. The current supplying circuit supplies a precharge current to the data sense line such that the bit line is precharged to the precharge voltage. The current supplying circuit also supplies a sense current lower than the precharge current, such that variation of the precharge voltage based on data stored in a selected memory transistor connected to the bit line is amplified to the voltage variation on the data sense line. The sense amplifier senses and latches data according to the amplified voltage variation.

REFERENCES:
patent: 5253201 (1993-10-01), Atsumi et al.
patent: 5268867 (1993-12-01), Momodomi et al.
patent: 5305273 (1994-04-01), Jinbo
patent: 5473565 (1995-12-01), Suh et al.

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