Data processor with circuitry for handling pointers associated w

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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39580023, 395606, 711202, 711221, G06F 1202

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active

057271763

ABSTRACT:
A data processor includes a plurality of physical registers and a decoder that decodes a stream of instructions into micro-operations which include speculative operations specifying associated logical registers. The data processor further includes a register-alias table having a plurality of addressable entries corresponding to logical registers, specified by the speculative operations. Each entry of the register-alias table contains a register pointer to a corresponding physical register. The processor further includes a retirement register file that maintains register values of non-speculative operations, and a retirement array that maintains a retirement ordering for the retirement register file. Both the register-alias table and retirement array are updated by circuitry that is responsive to a register exchange operation; the circuitry swapping register pointers associated with first and second entries, respectively.

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Popescu,et al., "The Metaflow Architecture," IEEE Micro, Jun. 1991,pp. 10-13, 63-73.

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