Data processor having unified memory architecture using...

Details Data processor having unified memory architecture using... Data processor having unified memory architecture using...

2005-10-11

2005-10-11

Chauhan, Ulka J. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Graphic display memory controller

C345S531000, C345S541000, C345S503000, C711S151000, C711S167000, C711S168000

Reexamination Certificate

active

06954206

ABSTRACT:
In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory200is generated from the CPU310, the memory controller400holds it once, requests the display controller560to stop the access to the memory200which is in execution, when data to the access executed already is transferred from the memory200, holds it, and transfers the access request from the CPU bus310which is held by the memory200. When the access from the CPU bus310ends, the memory controller400restarts the access stopped in the display controller560and passes the held data to the display controller560.

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