Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent
1993-09-15
1999-01-12
Tokar, Michael J.
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
326 83, 326 86, H03K 1716, H03K 190175
Patent
active
058595414
ABSTRACT:
A data processor has at least one output terminal which a user of the data processor can vary the output impedance thereof depending upon the application environment of the data processor. A first output buffer of an output buffer stage has a predetermined output impedance and is coupled between an input of the stage and the output terminal. The first output buffer provides a first output terminal impedance. A second output buffer having a lower output impedance than the first output buffer may be selectively coupled in parallel to the first output buffer to reduce the output impedance of the output terminal. The coupling of the output buffers is controlled by a user of the data processor who provides a control input for selecting one of a plurality of predetermined output terminal impedance values.
REFERENCES:
patent: 3435375 (1969-03-01), Miller, Jr.
patent: 3854057 (1974-12-01), Williams et al.
patent: 4432049 (1984-02-01), Shaw et al.
patent: 4567385 (1986-01-01), Falater et al.
patent: 4695740 (1987-09-01), Carter
patent: 4719369 (1988-01-01), Asano et al.
patent: 4761647 (1988-08-01), Hallenbeck et al.
patent: 4791322 (1988-12-01), Graham et al.
patent: 4806802 (1989-02-01), Okitaka et al.
patent: 4839537 (1989-06-01), Ueno
patent: 4853560 (1989-08-01), Iwamura et al.
patent: 4855623 (1989-08-01), Flaherty
patent: 4877978 (1989-10-01), Platt
patent: 4975598 (1990-12-01), Borkar
patent: 5039874 (1991-08-01), Anderson
patent: 5059830 (1991-10-01), Tokumaru et al.
patent: 5063308 (1991-11-01), Borkar
patent: 5107230 (1992-04-01), King
patent: 5134311 (1992-07-01), Biber et al.
patent: 5140194 (1992-08-01), Okitaka
patent: 5162672 (1992-11-01), McMahan et al.
Gallup Michael Gordon
Gay James George
Ledbetter, Jr. William Burl
McMahan Steven Craig
Scheuer Kenneth Charles
King Robert L.
Motorola Inc.
Roseen Richard
Tokar Michael J.
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