Electrical computers and digital data processing systems: input/ – Access arbitrating
Reexamination Certificate
2007-12-19
2010-11-23
Rinehart, Mark (Department: 2111)
Electrical computers and digital data processing systems: input/
Access arbitrating
C710S030000, C710S038000, C710S039000, C710S042000, C710S113000, C710S309000, C710S310000, C710S316000
Reexamination Certificate
active
07840737
ABSTRACT:
This invention provide a data processor capable of multiplexing data transfers with desired data transfer characteristics guaranteed, without multiplexing buses. The data processor includes: a transfer path that mutually connects plural processors and plural transfer element circuits such as memory; an arbitration circuit that controls data transfer in the transfer path; and a control register that defines the priority and minimum guaranteed bandwidth of data transfer. The arbitration circuit decomposes data packets sent from plural data transfer sources into subunits, and reconstructs plural data packets having the same data transfer target, based on priority and minimum guaranteed bandwidth stored in a control register. Thereby, the one reconstructed data packet can include subunits of plural data packets from transfer sources having different priorities, and data amounts of subunits contained in it can satisfy minimum guaranteed bandwidth of data transfer.
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Cerullo Jeremy S
Miles & Stockbridge P.C.
Renesas Electronics Corporation
Rinehart Mark
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