Electrical computers and digital processing systems: memory – Address formation – Address multiplexing or address bus manipulation
Patent
1996-10-11
2000-01-04
Lane, Jack A.
Electrical computers and digital processing systems: memory
Address formation
Address multiplexing or address bus manipulation
711111, 711201, 36523002, 365222, G06F 1200
Patent
active
RE0364827
ABSTRACT:
A microprocessor has a register in which attributive data corresponding to a memory to be coupled to the microprocessor is written, and a control circuit which controls address signals to be supplied to the memory in accordance with the attributive data. The attributive data is composed of range data for discriminating ranges of address data supplied to an address bus, system data indicative of addressing systems of the memories corresponding to the respective address ranges, and bit number data indicative of numbers of address bits of the memories. Thus, in a case where the memory to be accessed is of an address multiplexing system as in a dynamic RAM, the address data of the address bus is divided into row address data and column address data, which are then supplied to the memory in time division.
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patent: 4755964 (1988-07-01), Miner
patent: 4835733 (1989-05-01), Powell
Hitachi , Ltd.
Lane Jack A.
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