Data processor and control system

Electrical computers and digital data processing systems: input/ – Interrupt processing

Reexamination Certificate

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Details

C710S058000, C710S100000, C710S267000, C710S306000, C710S005000, C710S006000

Reexamination Certificate

active

07822899

ABSTRACT:
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.

REFERENCES:
patent: 5493656 (1996-02-01), Tsukamoto
patent: 5646983 (1997-07-01), Suffern et al.
patent: 5930488 (1999-07-01), Mitsuishi
patent: 6218971 (2001-04-01), Sugihara
patent: 6374145 (2002-04-01), Lignoul
patent: 2008/0147949 (2008-06-01), Miyake
patent: 64-055667 (1989-03-01), None
patent: 07-105124 (1995-04-01), None

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