Data processor

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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Details

C713S300000, C713S320000, C713S500000, C713S501000, C714S100000

Reexamination Certificate

active

11130218

ABSTRACT:
It is aimed at providing a data processor capable of suppressing a sudden current change from the viewpoint of a synchronization clock. A data processor1comprises a clock pulse generation circuit and a circuit module operating on input clock signal CLKi output from the clock pulse generation circuit. In case of restoration from a power-on reset period or a standby state, the clock pulse generation circuit stepwise changes frequencies of the clock signal from low to high frequencies. This makes it possible to prevent a power supply current from suddenly increasing in case of restoration from the power-on reset period or the standby state.

REFERENCES:
patent: 5778237 (1998-07-01), Yamamoto et al.
patent: 5822596 (1998-10-01), Casal et al.
patent: 5875120 (1999-02-01), Matsushima et al.
patent: 5978864 (1999-11-01), Hetherington et al.
patent: 6460125 (2002-10-01), Lee et al.
patent: 7000130 (2006-02-01), Adachi
patent: 05-333963 (1993-12-01), None
patent: 7-287699 (1995-10-01), None
patent: 09-231195 (1997-09-01), None

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