Data processing systems including high performance buses and...

Details Data processing systems including high performance buses and... Data processing systems including high performance buses and...

2006-05-23

2006-05-23

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S110000, C710S260000

Reexamination Certificate

active

07051146

ABSTRACT:
A processor is disclosed that executes an instruction including a user-defined value (an address or a command) and provides the user-defined value during execution of the instruction. In one embodiment the processor includes a bus interface adapted for coupling to a bus, and the processor drives the user-defined address or command upon one or more signal lines of the bus via the bus interface during execution of the instruction. A described data processing system includes the processor coupled to a device including an addressable register. The device receives a user-defined address from the processor and accesses the addressable register in response to the user-defined address. Methods are disclosed for obtaining a value stored in an addressable register, providing a value stored in an addressable register, storing a value in an addressable register, and modifying a value stored in an addressable register.

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