Data processing system with on-chip FIFO for storing debug...

Details Data processing system with on-chip FIFO for storing debug... Data processing system with on-chip FIFO for storing debug...

2001-02-21

2004-07-06

Beausoliel, Robert (Department: 2184)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S031000, C714S039000, C717S124000, C717S127000, C717S128000

Reexamination Certificate

active

06760864

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to data processing systems, and more particularly, to a data processing system with an on-chip debug FIFO capable of storing change-of-flow addresses, data values, or current instruction addresses.
BACKGROUND OF THE INVENTION
In previous microcontrollers, program debugging was primarily based on in-circuit emulators and logic analyzers which relied on access to address and data signals on external pins. In older microcontroller systems it was possible to collect debug information by monitoring address, data, and control signals with external equipment such as a logic analyzer or a bus state analyzer. With modem advances in silicon processing technology, the silicon area and cost of bonding pads for external pins has risen dramatically relative to the cost of internal logic. It is now desirable to produce microcontroller integrated circuits which do not have external pins for address and data signals, but this presents a problem for product development and program debugging.


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Copy of related U.S. patent application SC10980TH entitled, “Data Processing System Having An On-Chip Background Debug System Having An On-Chip Background Debug System and Method Therefor” (17 pgs.), filed on Feb. 16, 2001.

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