Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2008-01-13
2010-11-16
Petranek, Jacob (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Branching
Reexamination Certificate
active
07836286
ABSTRACT:
The present invention provides a data processor or a data processing system which can be used in compatible modes among which the number of bits of an address specifying a logical address space varies at the time of referring to a branch address table by extension of displacement of a branch instruction. At the time of generating a branch address of a first branch instruction, the data processor or the data processing system optimizes a multiple with which a displacement is multiplied in accordance with the number of bits of an address specifying a logical address space, adds extended address information to the value of a register, and refers to a branch address table with address information obtained by the addition. The referred information is used as a branch address. To be adapted to a compatible mode using different number of bits of an address specifying a logical address space, it is sufficient to change a multiple with which the displacement is multiplied in accordance with the mode.
REFERENCES:
patent: 5671434 (1997-09-01), Menadue et al.
patent: 7003651 (2006-02-01), Kondoh et al.
patent: 2007/0106883 (2007-05-01), Choquette
patent: 2009/0204798 (2009-08-01), Alexander et al.
patent: 2002-14808 (2002-01-01), None
patent: 2002-229778 (2002-09-01), None
Miles & Stockbridge P.C.
Petranek Jacob
Renesas Electronics Corporation
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