Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1999-07-27
2002-08-20
Wong, Peter (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S031000, C710S052000
Reexamination Certificate
active
06438634
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a system in which data transfer interfaces of mutually different apparatuses are connected via a bidirectional bus to each other and a data transfer method for use with the system, and in particular, to a data processing system and a data transfer method suitable for improving an availability ratio of the bidirectional bus.
Heretofore, there has been commonly known a data processing system in which data transfer interfaces of mutually different apparatuses A and B are connected to each other via a bidirectional bus commonly used to transmit and to receive signals. When mutually trans- ferring data between apparatuses A and B, a right of use or a bus mastership of the bus is granted for apparatus A or B depending on arrival of data therefrom at the bus.
In the system, for example, when apparatus A issues a data read request and a data write request to apparatus B, apparatus A transfers data related to the write request (write data) to apparatus B. On the other hand, apparatus A receives data associated with the read request (i.e., read data) from apparatus B. In the operation, apparatus B receives the write data from apparatus A. In response to the read request, apparatus B obtains data thus requested and transfers the data as read data to apparatus A. In consequence, there occurs a situation in which the read data and the write data alternately pass the bidirectional bus. Therefore, the data transfer direction of the bus between apparatuses A and B is frequently changed, which resultantly leads to an abrupt decrease in the bus availability ratio depending on cases.
SUMMARY OF THE INVENTION
In the conventional system described above, when read data and write data are transferred between apparatuses A and B via the bidirectional bus, there possibly occurs an event in which the data transfer direction of the bus is frequently altered. On such an occasion, the transfer direction change occupies most of the data transfer time and causes a problem of the abrupt decrease in the availability ratio of the bidirectional bus.
It is therefore an object of the present invention to minimize, in a system in which data is transferred via a bidirectional bus between mutually different apparatuses A and B, the number of transfer direction changes of the bus to decrease overhead of the transfer direction changes so as to improve the availability ratio of the bidirectional bus.
In accordance with the present invention, there is provided a data processing system in which data interfaces of at least two different apparatuses are connected via a bidirectional bus to each other, wherein an apparatus to issue a write request includes a write buffer in which a write request and write data of the write request are once stored. When a predetermined number of write requests and write data thereof are accumulated in the buffer, the write request issuing apparatus changes the transfer direction of the bidirectional bus to a write request transfer direction to successively transfer the plural write requests and write data thereof to associated communicating apparatuses. This reduces the number of transfer direction changes of the bus for the read and write data and hence improves the availability ratio of the bidirectional bus.
One of the apparatuses of the system includes a circuit to monitor a read data transfer status of the bidirectional bus. In a situation in which the number of write requests and the write data thereof in the write buffer is less than the predetermined value, when the monitor circuit detects a status that the bidirectional bus is not being used to transfer read data, i.e., the bus is available, the transfer direction of the bus is changed even if the write buffer contains only one write request and write data thereof. This also increases the availability ratio of the bidirectional bus.
REFERENCES:
patent: 4805098 (1989-02-01), Mills, Jr. et al.
patent: 5224214 (1993-06-01), Rosich
patent: 5517660 (1996-05-01), Rosich
patent: 5257856 (1993-10-01), None
Ando Toshimitsu
Iizuka Takuya
Watanabe Satoru
Antonelli Terry Stout & Kraus LLP
Chung-Trans X.
Hitachi , Ltd.
Wong Peter
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