Data processing system including a solid-state memory capable of

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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711103, 711115, G06F 1200

Patent

active

058988840

ABSTRACT:
A data processing system includes a CPU, an address decoder for generating a location designation signal which designates a location of a predetermined area of address area meeting a predetermined correspondence relation to a numerical address supplied from the CPU, and a memory securing locations of a plurality of areas capable of being designated by the location designation signal for the address decoder. The address decoder generates a location designation signal designating a location of a predetermined area in the address area corresponding to the numerical address supplied from the CPU in a predetermined relation different from the predetermined correspondence relation in response to an external operation, and designates according to the designation signal designating the location in the different predetermined correspondence relation, a location in a solid-state memory capable of being loaded in and unloaded from the system as a location equivalent to a location of a non-volatile memory in which CPU programs and operation parameters are stored.

REFERENCES:
patent: 5487161 (1996-01-01), Koenck et al.
patent: 5548640 (1996-08-01), Blondel et al.

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