Data processing system having selectable exception table relocat

Details Data processing system having selectable exception table relocat Data processing system having selectable exception table relocat

1998-04-20

2000-06-20

Treat, William M.

Electrical computers and digital processing systems: processing

Processing control

Branching

G06F 1202

Patent

active

060790156

ABSTRACT:
A data processing system (20) has a central processing unit (CPU) (22) and a memory (30) for storing an exception table. The exception table is mapped in the memory (30) in consecutive segments, with each segment for storing a predetermined number of instructions for executing the exception. By asserting a control bit, the exception table can be relocated, or remapped, and compressed into a jump table. The jump table stores only jump instruction for branching to the exception routines, which are relocated to other memory locations. The jump table is generated from the starting addresses of the exception routines. Relocating the exception routines allows for more efficient use of internal memory space of the data processing system (20).

REFERENCES:
patent: 4744048 (1988-05-01), Blanget et al.
patent: 4802119 (1989-01-01), Henne et al.
patent: 5222226 (1993-06-01), Yamaguchi et al.
patent: 5615400 (1997-03-01), Couesar et al.
patent: 5903718 (1999-05-01), Marik

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