Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2008-05-20
2008-05-20
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S203000, C711S205000, C711S207000, C711S138000, C712S200000
Reexamination Certificate
active
11360926
ABSTRACT:
In a data processing system a processor including processing logic performs data processing. An address translator that is coupled to the processing logic performs address translation and a method thereof. The address translator receives a logical address and converts the logical address to both a physical address and one or more address attributes. Bypass circuitry that is coupled to the address translator selectively provides the logical address as a translated address of the logical address which was received. In order to speed up the memory address translation, the logical address is selectively provided as the translated address prior to providing the one or more address attributes associated with the logical address.
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Chiu Joanna G.
Farrokh Hashem
Freescale Semiconductor Inc.
King Robert L.
Sparks Donald
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