Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Patent
1995-09-27
1998-05-12
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
364DIG1, G06F 1300
Patent
active
057522677
ABSTRACT:
A data processing system (10) flexibly interfaces with both a variety of memory devices and external peripheral devices. A control register (94) is provided for dynamically controlling a timing relationship for read and write accesses executed by the system. A first set of bits (PA) in the control register provides timing control for an initial amount of time required to read a first data value from an external device. A second set of bits (SA) in the control register provides timing control for each successive amount of time required to read a successive data value from the external device.
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European Search Report and Commuication dated Feb. 19, 1997.
Arends John H.
Kirtland Charles
Moyer William C.
Langjahr David
Motorola Inc.
Swann Tod R.
Yudell Craig J.
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