Electrical computers and digital processing systems: support – Multiple computer communication using cryptography – Protection at a particular protocol layer
Patent
1998-02-09
2000-04-11
Beausoliel, Jr., Robert W.
Electrical computers and digital processing systems: support
Multiple computer communication using cryptography
Protection at a particular protocol layer
711163, G06F 1214
Patent
active
060498765
ABSTRACT:
A data processing system (10) which detects unauthorized memory accesses has trap door logic (17) that receives memory address bus (16) signals from a processor (12). The trap door logic (12) utilizes address detection logic (50, 52) to identify page numbers utilizing high order address bits and trap regions utilizing low order address bits. The resulting page number (70-76) signals and trap region (41-44) signals are selectively combined (54) to generate an exception signal (18) which is received by security logic (19). The selective combination (54) may be programmed, or may be fixed during fabrication. In response to the exception signal (18), the security logic (19) implements a predefined security policy, which is transmitted to the processor (12) over control lines (20).
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Aslam Taimur
Moughanni Claude
Moyer William C.
Beausoliel, Jr. Robert W.
King Robert L.
Motorola Inc.
Revak Christopher A.
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