Patent
1997-04-25
1999-02-23
Eng, David Y.
G06F 900
Patent
active
058753265
ABSTRACT:
During operation of a pipelined data processing system, an interruptible instruction table is used to store target identifiers associated with instructions which may result in speculative execution. During operation of the interruptible instruction table, a pointer, referred to as a completing instruction buffer entry pointer, points to a bottom of the interruptible instruction table if that table includes any instruction. An entry at the bottom of the interruptible instruction table is a next instruction to complete. This entry includes a target identifier, referred to as a non-speculative-non-interruptible TID, may be used to release resources held for all prior executed instructions. The data processing system determines the value of the non-speculative-non-interruptible TID to ensure that order determination is preserved and provides a true speculative execution point.
REFERENCES:
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patent: 5708788 (1998-01-01), Katsuno et al.
Cheong Hoichi
Jordan Paul Joseph
Le Hung Qui
Apperley Elizabeth A.
Eng David Y.
England Anthony V. S.
International Business Machines - Corporation
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