Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2008-09-16
2008-09-16
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S006000, C711S202000, C711S204000, C711S205000, C711S206000, C711S207000, C711S208000, C711S209000, C711S210000, C711S170000, C711S171000, C711S172000, C711S173000
Reexamination Certificate
active
10814733
ABSTRACT:
A method, computer program product, and a data processing system for supporting memory addresses with holes is provided. A first physical address range allocated for system memory for an operating system run by a processor configured to support logical partitioning is virtualized to produce a first logical address range. A second physical address range allocated for system memory for the operating system is virtualized to produce a second logical address range. The first physical address range and the second physical address range are non-contiguous. Virtualization of the first and second physical address ranges is had such that the first logical address range and the second logical address range are contiguous. A memory mapped input/output physical address range that is intermediate the first physical address range and the second physical address range is virtualized to produce a third logical address range. A lowermost logical address of the third logical address range exceeds a respective upper most logical address of the first and second logical address ranges.
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Campos Yaima
Gerhardt Diana K.
Shah Sanjiv
Yee Duke W.
Yociss Lisa L. B.
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