Static information storage and retrieval – Read/write circuit – With shift register
Reexamination Certificate
2006-05-19
2010-12-21
Hur, J. H. (Department: 2824)
Static information storage and retrieval
Read/write circuit
With shift register
C365S189080, C365S190000, C365S200000
Reexamination Certificate
active
07855924
ABSTRACT:
A memory circuit includes a memory cell, a pair of conducting lines operable to signal the logic state of the memory cell and read circuitry operable to perform a read operation by detecting a voltage level of at least one of the pair of conducting lines. The memory circuit includes a pull-down circuit having an on configuration in which it is operable to pull-down a voltage level of at least one of the pair of conducting lines so as to affect the read operation and an off-configuration in which the pull-down circuit cannot affect the read operation. Control circuitry is configured to control whether the pull-down circuit is in the on configuration or the off configuration. The memory circuit can be incorporated in a data processing apparatus and a method of operating a memory circuit is provided in which a pull-down circuit is controlled to be in an on configuration or in an off configuration.
REFERENCES:
patent: 6370068 (2002-04-01), Rhee
patent: 6452859 (2002-09-01), Shimano et al.
patent: 6882555 (2005-04-01), Fenstermaker et al.
Bull David Michael
Das Shidhartha
Hoxey Paul Darren
New David
ARM Limited
Hur J. H.
Nguyen Hien N
Nixon & Vanderhye P.C.
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