Data processing device equipped with a thread switching circuit

Details Data processing device equipped with a thread switching circuit Data processing device equipped with a thread switching circuit

2001-03-16

2004-08-03

Zhen, Wei (Department: 2122)

Data processing: software development, installation, and managem

Software program development tool

Testing or debugging

C717S127000, C712S228000, C712S229000

Reexamination Certificate

active

06772412

ABSTRACT:

FIELD OF THE INVENTION
This invention concerns a stack machine which switches between a number of programs (threads) it is executing while maintaining a work area for each one. More specifically, it concerns a technique to control how the stack machine switches from thread to thread.
BACKGROUND OF THE INVENTION
Programs written in java®, an object-oriented language developed by Sun Microsystems, are converted into byte code, so they operate in an environment with a Java interpreter rather than relying on a platform.
A computer with a control mechanism which can execute these Java byte codes (hereafter referred to as a “Java control mechanism”) has a virtual machine called a “stack machine”. This is used to execute a number of Java programs (or threads). A stack machine consists of a memory area (or stack) where a work area is set up for each thread and a control device (hereafter referred to as a “stack machine controller”) which stacks work areas in this stack and executes each thread.
The aforesaid stack machine controller is actually a function in the computer's processor. A given number of registers in the processor are assigned to store the pointers indicating the status of the program, including the thread currently being executed and the location that has been reached in the thread's program. (Hereafter, these registers are referred to as the “control register group” and data stored in the control register group are referred to as “register data.”)
The stack machine controller reads and writes data to and from the control register group and the thread work areas based on the results of executing the program in byte code. In this way it executes the program according to the thread which it has currently selected.
When the aforesaid stack machine controller is to switch between threads, it must sidetrack the current descriptive values in the aforesaid control register group, read out the previously sidetracked register data for the thread to which it is switching (for a newly activated thread, these will be the initial register data), and set these values in the control register group to change the status of the program.
The switching of threads is controlled by a program for that purpose. However, when this program is executed in a stack machine controller, difficulties arise in the processing which accompanies the execution of this program to change the descriptive values in the aforesaid control register group and sidetrack the data. In the prior art, a separate stack and control mechanism were used to execute a thread dedicated to the control of switching.
FIG. 4
shows a prior art configuration for a data processing device with a stack machine.
In the figure,
21
is the aforesaid stack machine controller for processing multiple threads.
22
is the stack machine controller (hereafter referred to as the “system stack controller”) to execute the thread (hereafter referred to as the “system thread”) to control switching between the aforesaid threads. Both are in Java control mechanism
23
, which has the function of executing byte code.
Each of controllers
21
and
22
has a control register group,
24
or
25
, and a program logic circuit (not pictured) to manage the reading and writing of data from and to control register group
24
or
25
. Register groups
24
and
25
each have a stack head pointer to indicate the location of the head of the stack to be controlled; a program counter to indicate the current location being executed in the program; and a local variable pointer to indicate the location where local variables used in each method are stored.
The program logic circuit in stack machine controller
21
has a discrimination circuit (not pictured) which recognizes when it is necessary to switch stacks and sends a “switch threads” request to system stack controller
22
.
26
in the drawing is the memory (a RAM) in the data processing device. Two kinds of stacks (i.e., program stack
27
and system stack
28
) are set up for the two controllers
21
and
22
.
An individual work area
29
is set up in program stack
27
(i.e., the stack
27
for multiple thread processing) for each thread which is activated. (However, to simplify the illustration, work areas
29
are shown for only two threads, which are called thread
1
and thread
2
.) System stack
28
has a work area
31
for the aforesaid system thread.
When programs are accessed to execute methods in threads, work areas (or frames) for those programs are stacked in thread work areas
29
and
31
.
A sidetracking area
30
(hereafter, this sidetracking area is referred to as “sidetracking area
30
for register data”) is set up in the thread work area
29
for each program stack. These areas
30
are used to sidetrack the register data from control register group
24
of the aforesaid stack machine controller
21
when switching to another register.
In
FIG. 4
, for the sake of convenience one set of sidetracking areas
30
is shown for each thread outside the block representing thread work area
29
. Actually, sidetracking areas
30
are secured in thread work areas
29
in a specific location in each frame which is set up. And, although it is not shown in the illustration, a pointer (or memory location) to identify the frame of the method being executed in each thread (hereafter referred to as the “current frame pointer”) is stored in each thread work area
29
.
FIG. 5
shows the order of processing in a data processing device configured as described above. In the drawing, the box A drawn in dotted lines indicates the extent of the processing executed by stack machine controller
21
; box B indicates the extent of the processing executed by system stack controller
22
.
In the drawing, in Step
1
, stack machine controller
21
reads and writes data into and
10
out of the work area
29
in program stack
27
for the current thread as well as into and out of internal control register group
24
as it executes the processing in that thread. When it recognizes that an event has occurred in the processing that requires another thread to be executed, we proceed from Step
2
to Step
3
, and the controller sends a “switch threads” request to system stack controller
22
.
When it receives the aforesaid “switch threads” request, system stack controller
22
executes the aforesaid system thread. It reads out the register data from control register group
24
in stack machine controller
21
and sidetracks them in the register data sidetracking area
30
for the current thread (in this case, the sidetracking area in the frame currently being accessed which is indicated by the aforesaid current frame pointer) (Step
4
). In Step
5
, controller
22
reads the register data for the thread it is switching to out of the sidetracking area
30
for the current frame in thread work area
29
and sets them in the control register group
24
for stack machine controller
21
.
This switches the thread to the one that stack machine controller
21
must now execute. We go back to Step
1
and the new thread is executed.
As is shown in
FIG. 6
, a software mechanism
32
in another program (for example, a program execution mechanism in C) which is outside of Java control mechanism
23
may be used instead of the aforesaid system stack controller to switch threads. Software execution mechanism
32
executes the aforesaid program to switch threads as it accesses work area
33
in memory
26
. The processing it executes is the same as in the aforesaid FIG.
5
B. In this way the thread is switched in response to a “switch threads” request from stack machine controller
22
.
With the configuration in
FIG. 4
to set up a system stack controller
22
to control switching, a separate control register group
25
must be created in system stack controller
22
to execute the system thread. This takes up a great deal of register space. A number of stacks must also be set up in memory
26
, which requires substantial memory space.
With the configuration shown in
FIG. 6
, which uses a software mechanism
32
written in a d

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