Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2002-01-23
2004-08-31
Nguyen, Cuong (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S301000
Reexamination Certificate
active
06784519
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device employed in DSPs (digital signal micro processors), CPUs (central processing units), memory devices, computer memory, etc., for electronic devices such as computers; and in further detail, it relates to a semiconductor device equipped with a capacitor buried in a semiconductor substrate made from silicon etc.
2. Description of the Prior Art
With the progress in recent technology, content is transferred by the technology used for music distribution, animation, true color moving pictures, etc., and the development of electronic devices related thereto is under way. Various technical innovations on devices related to the transfer and/or multimedia in this field are being made.
Concerning technology regarding integrated circuit design and devices, key items are, for instance, a DSP (Digital Signal Processor), an MPU (Micro Processor Unit), and memory devices (such as ROM and RAM). Further required on such devices are designs capable of realizing higher control speed, larger memory capacity, and higher stability in performance.
In order to achieve high speed operation with the semiconductor devices based on IC chips and the like known heretofore, measures have been taken to directly attach proper external components such as chip capacitors (decoupling capacitors) to an interposer. Further concerning the internal structure of the semiconductor device, attempts have been made to newly employ copper, which replaces conventionally used aluminum, as the patterning material for forming circuits.
However, the semiconductor devices known heretofore failed to sufficiently achieve the requirements concerning, for instance, higher control speed, larger memory capacity, and higher stability in IC performance.
In semiconductor devices such as IC chips, a wire bonding method is employed in connecting each of the bonding pads (pads for drawing external electrodes), which are provided for the periphery of the surface of the device, with each of the lead electrodes of the lead frame. In addition to the above, wireless bonding methods are employed for forming joints without using wires, and among them, frequently employed are a flip-chip method using solder, bumps, etc., and a TAB method using bump tapes, etc.
In
FIG. 7
a schematically shown external appearance of a DRAM device and a DSP device (
60
) are illustrated as examples of semiconductor devices known in the art. A signal line is shown by an arrowhead (→)
62
, which is externally connected with a chip capacitor (decoupling capacitor)
63
, etc. A bonding wire
61
is disposed outward from the periphery of the device
60
. Shown aligned therein are plural bonding wires connected to the outside.
SUMMARY OF THE INVENTION
The present invention has been made in the light of the aforementioned problems of the semiconductor devices known heretofore described above, and a great improvement is made to the structure and the method of producing the semiconductor devices. The invention provides a key technology for such semiconductor devices, and an object of the present invention is to provide a semiconductor device capable of sufficiently satisfying requirements for future devices such as higher control speed, larger memory capacity, and higher stability in performance. Hence, the invention relates to a semiconductor device equipped with a buried type capacitor that is formed by directly burying the capacitor in a semiconductor substrate (a wafer) made of a material such as silicon and gallium. The invention further includes a particularly useful interconnection technology also useful for semiconductor devices comprising a laminate module (constitution element) having multiple layers on a semiconductor base body or a bare die (exposed chip body), which attains a high precision layer structure and assembly process therefor in semiconductor devices made from materials such as silicon and GaAs.
In order to solve the aforementioned problems, the semiconductor device according to the present invention utilizes means as follows. The attached symbols are in conformity with those shown in the drawings.
(1) A three-dimensional cavity
11
is formed aligned in a planar semiconductor substrate
10
, a capacitor part A is provided with a capacitor structure of a substrate buried type directly formed by burying the capacitor structure inside the cavity
11
, and semiconductor base bodies (
101
-
103
) containing the capacitor part A as one constituent, are incorporated to implement a semiconductor device.
(2) In the semiconductor device (1), the capacitor part A is constructed by implementing a capacitor structure comprising a cavity
11
having an aperture (open side) on the surface (device front)
10
of the substrate and extending to an inner part or else reaching the back surface of the substrate.
(3) In the semiconductor device (1) or (2), the cavity
11
is formed and constructed by etching using, for instance, plasma, etc.
(4) In the semiconductor device (1) to (3), an insulator layer
12
such as a silicon oxide film is formed and constructed on the surface (device front) of the semiconductor substrate
10
or on the inner surface of the cavity
11
for passivation.
(5) In the semiconductor device (1) to (4), the capacitor part A is constructed by providing a capacitor structure of a through substrate type cavity, which penetrates inside the substrate
10
from the front surface of the body
10
to the back surface.
(6) In the semiconductor device (1) to (5), the cavity
11
is provided in an approximately truncated cone shape, having a structure with its aperture opened on the front surface (device front) of the body.
(7) In the semiconductor device (1) to (6), a capacitor structure is implemented on the inner surface of the cavity part A by forming a laminated structure of a first electrode layer
13
, a dielectric layer
14
, and a second electrode layer
15
, by means of a thin film deposition method such as CVD, sputtering, electric deposition, spin coating, painting, etc. Further preferably, a sealing material
16
, such as polyimide, a metal, etc., is filled inside the concave portion provided on the upper layer of the dielectric layer
14
in the cavity
11
.
(8) In the semiconductor device (7), trimming is performed on the dielectric film (dielectric layer) provided in the layer toward the front surface. Trimming refers to controlling the size and the capacity of the dielectric film (dielectric layer) by using a means such as laser, and this enables adjusting the capacitance to a proper value.
(9) In the constitution of the semiconductor device (1) to (8), the back surface of the substrate
10
at the location of the cavity
11
therein is removed by a means such as etching, etc., such that the device will have an exposed electrode layer
13
′.
(10) In the constitution of the semiconductor device (1) to (9), the capacitor part A is arranged so that it can be connected to power source, ground, and a signal line.
(11) In the constitution of the semiconductor device (1) to (9), the capacitor part A is arranged so that it can be connected to a clock line.
(12) In the constitution of the semiconductor device (1) to (9), the capacitor part A is placed just under or in the periphery of the input and output pad connected to the substrate.
(13) In the constitution of the semiconductor device (1) to (12), the semiconductor device comprises a laminated module structure containing a plurality of said semiconductor base bodies (
110
,
111
) stacked in layers, and ball bodies (
120
,
121
) are arranged interposed among said semiconductor base bodies (
110
,
111
).
(14) In the semiconductor device (13), the ball bodies (
120
,
121
) have elasticity and they form a cushion structure interposed among said semiconductor base bodies.
(15) In the semiconductor device (13), the ball bodies (
120
,
121
) have electric conductivity and they form an electrically conductive structure interposed among said semiconductor base bodies.
REFERENCES
Hashizume Kenichi
Iwamoto Takashi
Yoshimura Makoto
Antonelli Terry Stout & Kraus LLP
Nguyen Cuong
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