Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
Reexamination Certificate
2006-11-14
2006-11-14
Bullock, Jr., Lewis A. (Department: 2195)
Electrical computers and digital processing systems: virtual mac
Task management or control
Process scheduling
C718S107000, C712S228000, C712S031000, C712S034000
Reexamination Certificate
active
07137121
ABSTRACT:
A data-processing circuit includes first and second cooperating processors where one of the processors context switches between applications without running an operating system. In one implementation, the first processor operates under the control of an operating system to switch back and forth between executing a first application or portion thereof and executing a second application or portion thereof. And the second processor operates in a stand-alone mode to switch back and forth between the first application or a portion thereof and the second application or a portion thereof. In another implementation, the first processor runs a single application or portion thereof but no operating system, and the second processor operates in a stand-alone mode to switch back and forth between different applications or different portions of the same or different applications. Such a data-processing circuit allows multiple processors to run multiple applications and/or portions thereof “simultaneously” while at least one of the processors is operating in a stand-alone mode to reduce or eliminate operating-system overhead.
REFERENCES:
patent: 4729094 (1988-03-01), Zolnowsky et al.
patent: 4847751 (1989-07-01), Nakade et al.
patent: 5483647 (1996-01-01), Yu et al.
patent: 5495606 (1996-02-01), Borden et al.
patent: 5537548 (1996-07-01), Fin et al.
patent: 5794037 (1998-08-01), Young
patent: 5812843 (1998-09-01), Yamazaki et al.
patent: 6061711 (2000-05-01), Song et al.
patent: 6381682 (2002-04-01), Noel et al.
patent: 6507293 (2003-01-01), Deeley et al.
patent: 6571137 (2003-05-01), Muller
patent: 6631394 (2003-10-01), Ronkka et al.
patent: 6711605 (2004-03-01), Sekiguchi et al.
patent: 6742104 (2004-05-01), Chauvel et al.
patent: 6763458 (2004-07-01), Watanabe et al.
patent: 6772419 (2004-08-01), Sekiguchi et al.
patent: 6842857 (2005-01-01), Lee et al.
Solsana, Francesc et al. “Implementing Explicit and Implicit Coscheduling in a PVM Environment.” Euro-Par 2000—Parallel Processing: 6th International Euro-Par Converence, Munich, Germany, Aug./Sep. 2000.
Sahni, Sartaj. “Scheduling Master-Slave Multiprocessor Systems.” IEEE. Oct. 1996.
Ghormley, Douglas P. et al. “GLUnix: a Global Layer Unix for a Network of Workstations.” Jun. 1, 1998.
Yue, Kelvin K. et al. “Dynamic Processor Allocation with the Solaris Operating System.” 1998.
Liu, Xin et al. “Coscheudling on Cluster Systems.” 1998.
Yue, Kelvin K. et al. “An Effective Processor Allocation Strategy for Muliprogrammed Shared-Memory Multiprocessors.” IEEE. Dec. 1997.
Feitelson, Dror G. et al. “Coscheduling Based on Run-time Identification of Activity Working Sets.” Oct. 1992.
Cheng Evan
Gorgone Peter S.
Stotland Inga
Bullock, Jr. Lewis A.
Equator Technologies Inc.
Marger & Johnson & McCollom, P.C.
LandOfFree
Data-processing circuit and method for switching between... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data-processing circuit and method for switching between..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data-processing circuit and method for switching between... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3647693