Data processing apparatus with non-volatile memory for both...

Electrical computers and digital processing systems: support – Reconfiguration

Reexamination Certificate

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C711S103000

Reexamination Certificate

active

06629241

ABSTRACT:

FIELD OF THE INVENTION
The field of the invention is a data processing apparatus with a processor and a programmable non-volatile memory that stores both instructions of a program and data used by that program.
BACKGROUND OF THE INVENTION
U.S. Pat. No. 4,665,480 discloses a data-processing system that stores both instructions and data in the same non-volatile memory (EEPROM). The data values may change during execution of the program. This causes problems, particularly when the non-volatile memory needs to be erased during execution, because the memory is not accessible to load instructions for execution by the processor while erasing is going on. In a non-volatile memory with floating gate transistors for example, charge has to be transferred to or from the floating gates when the data is changed. This charge transfer takes much more time than reading. The memory is not available for reading during the charge transfer.
To solve this problem, the known processing system provides for a small auxiliary memory. In the auxiliary memory a subprogram is stored that controls the change in content of the non-volatile memory. When a program in the non-volatile memory needs to change the data in the non-volatile memory, the program transfers control to the subprogram. Thus, the processor can continue to load and execute instructions from the auxiliary memory while the data value in the non-volatile memory is changed.
The subprogram causes the processor to poll the non-volatile memory, to see whether changing of the data value has completed. When completion is detected, the subprogram transfers control back to instructions in the non-volatile memory, which is then again accessible to provide those instructions to the processor for execution.
SUMMARY OF THE INVENTION
It is an object of the invention to enable the processing apparatus to make more use of the instructions in the non-volatile memory.
It is a further object of the invention to enable the processing apparatus to handle situations where a real-time response is needed during said changing of the data, without requiring a large additional memory for instructions to control that response.
The data processing system according to the invention is set forth in claim 1. In the data processing system, changing of data is executed under control of instructions from an auxiliary memory.
According to the invention, the data processing system suspends changing of data in the non-volatile memory before said changing is complete. The system transfers control back from instructions in the auxiliary memory to instructions in the non-volatile memory during the suspension of changing. Subsequently the instructions in the non-volatile memory transfer control back to the auxiliary memory and changing is resumed.
Thus, it is possible to execute instructions from the non-volatile memory before changing of data in that non-volatile memory is complete, i.e. at a point in time where the non-volatile memory would normally prevent access while said changing is going on. Without suspension, an additional memory would be needed for these instructions. This would have to be an additional non-volatile memory if these instructions have to be replaceable and to be stored permanently (also when the power is removed).
The suspension of changing data in the non-volatile memory is achieved for example by removing a high voltage from the memory, so that charging or discharging of floating gates is interrupted and the floating gates for the changing data are left with a logically indefinite charge state, between the states that correspond to logic 1 and 0 respectively. Of course, the charge on the floating gates used for program instructions is not affected during changing of data.
The facility to suspend changing of data may be used to perform various kinds of processing during the suspension. For example, the processor may handle an interrupt generated during changing of the data. In this case, the suspension of changing may be generated by interrupt hardware, or by an instruction in auxiliary memory that is executed in response to the interrupt.
Alternatively, a subprogram in the auxiliary memory may start instructions in the non-volatile memory after some computed time-interval has elapsed. As an alternative, the suspension may be triggered by an exception that occurs during the execution of an instruction from the auxiliary memory, such as a software trap, a program jump to a location in the non-volatile memory etc. Again in this case, the suspension of changing may be generated by interrupt hardware, or by an instruction in auxiliary memory that is executed in response to the interrupt.
In an embodiment of the invention the instructions the processor tries to predict which instructions from non-volatile memory will be needed during the changing data in the non-volatile memory. The expected instructions are loaded into the auxiliary memory, so that they can be executed without suspending changing of the data. For other possible, but less likely, instructions provisions are made to suspend changing of data in the non-volatile memory and execution of instructions from the non-volatile memory.


REFERENCES:
patent: 4665480 (1987-05-01), Robert et al.
patent: 5522076 (1996-05-01), Dewa et al.
patent: 5535357 (1996-07-01), Moran et al.
patent: 5819087 (1998-10-01), Le et al.
patent: 6412055 (2002-06-01), Tallo et al.

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