Data processing apparatus with bus intervention means for contro

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

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710 22, 710128, G06F 1300

Patent

active

061226998

ABSTRACT:
This invention has as its object to improve the net processing speed by appropriately assigning the DMA processing time for attaining high-speed processing using hardware, and the software execution time of a CPU. By interrupting the operation of one of a CPU and a DMA processor only when a device such as an external D-RAM shared by processors such as the CPU, DMA processor, and the like, is to be accessed, the CPU operation and the DMA processing are substantially parallelly executed, thereby improving the net processing speed.

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