Data processing apparatus and shared memory accessing method

Details Data processing apparatus and shared memory accessing method Data processing apparatus and shared memory accessing method

2011-08-30

2011-08-30

Yu, Jae U (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C709S247000, C711S147000, C711S153000

Reexamination Certificate

active

08010746

ABSTRACT:
The present invention provides a data processing apparatus for processing data by causing a plurality of function blocks to share a single shared memory, the data processing apparatus including: a memory controller configured to cause the plurality of function blocks to write and read data to/and from the shared memory in response to requests from any one of the function blocks; a cache memory; and a companding section configured to compress the data to be written to the cache memory while expanding the data read therefrom.

REFERENCES:
patent: 2001/0001872 (2001-05-01), Singh et al.
patent: 05-073413 (1993-03-01), None

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